French TEMENTO Boundary Scan Test

France Tem boundary scan tester

For an electronic product, her life has to go through the stages of circuit design, design and debugging, process design, production and manufacturing, and repair after being put into use. In these stages, the circuit board must be tested and prepared or actually tested.

The design department shall do testable design of the circuit and experimental debugging of the circuit board, the process department shall formulate the test process and prepare the test procedure for the circuit board, the production department shall test the circuit board after the production and manufacture of the electrical equipment, and the maintenance department shall do fault inspection and repair for the circuit board that fails after use.

The boundary scan tester needle developed by French Temento company provides a working platform adapted to their respective characteristics for these four stages of the circuit board, or these four different departments.

ENG platform for the experimental debugging phase of the circuit board or the application of the department;

IND platform for the development of test process and preparation of test procedures phase or department application;

PRO platform for the actual test application of the production and manufacturing stage or department; (requires IND programming support)

REP platform for troubleshooting repair applications in the maintenance phase or department; (requires programming support from IND)

Each of these four series of products is divided into three levels:

Level C is the basic level and supports 1-3 TAP ports;

E level is the expansion level, supporting 1-6 TAP ports;

P-level is the full level, supporting 1-unlimited TAP ports

In these series of products, IND-P are full-featured and high-level products.

Required Options:

TEM1 JTAG controller with 1 TAP interface with one cable

TEM4 JTAG controller with 4 TAP interfaces with one cable

(Choose one of the above two)

CAB cable

Other options:

ISP Flash on-board programming software

PCB PCB Image Software

IO 320 320 Point I/O Connector Extension

IO60 60 60-point I/O connector extension

ENG Design and Commissioning Platform

Experimental commissioning phase or sector applications for circuit boards

This platform allows engineers to take advantage of the full capabilities of boundary scan under the JTAG standard to confirm debugging and test the board. This platform contains all the functions: define test objects, check BSDL, check scan links, perform interconnection tests, generate functional tests with TCL, and diagnose signals and nodes. All work can be completed in less than 2 days. An important benefit is that test coverage and testability can be analyzed during the design debugging phase, and the use of dot navigation can easily adjust the design to improve testability and test coverage, so that DFT can be further optimized.

Make your work flexible, versatile, scalable and faster!

Technical Points of Designing and Debugging Platform

Test coverage and testability analysis

BSDL Device Inspection

Basic structure check (scan link integrity check)

ATPG Automatic Test Program Generator for Interconnection, Intersection, Memory

Interactive Debugging

Support more than 90 kinds of network table format

Using TCL language to develop user test program

Display results with waveform diagrams or status tables

Interactive Troubleshooting Circuit Board or Device

Interactive control and observation of digital signals on registers, buses, pins

On-board programming for FLASH and PLD

SVF file format output

PCI and USB interface controllers

Designing and debugging platform including software modules

System construction: define components, areas, boards, systems, network table import

Toolbox: Advanced debug functions, independent confirmation of TMS, TCK, TDI, TDO, TRST signals

BSDL Check: Check that the BSDL conforms to the IEEE 1149.1 specification

Interactive debugging: fault isolation, easy to debug diagnosis

ATPG1 Basics: Check scan links to align with design performance

ATPG2 Interconnect: Automatically test interconnections between testable pins

ATPG3 storage area: auto test SRAM, SDRAM, DDR2,FLASH, NAND FLASH,

SIP Serial Flash, interconnection between devices such as Asynchronous FIFOs

Test extension: TCL test extension for testing user-defined additional further tests

Program loading: FPGA and CPLD loading program can be debugged and tested at the same time

Flash programming (option): can be any form of Flash memory programming

Netlist Merging (option): A netlist for an automated production system, generated for panel testing.

Dot navigation: generate interactive reference table, display dot, pin, JTAG unit,

Can be searched by name, pin, unit

Run time generation: output all databases to other related platforms

API server (option): can provide an application program interface to a common software platform used by users, such

Integration of JTAG testing Windows CVI, Labview, etc.

IND programming test platform

For the development of test process and preparation of test procedures stage or department application;

The platform itself can perform complete tests, but also the test ready, complete submission to the next production test platform, so that the production test platform can be simple and complete operation of the test.

Technical Points of Programming Test Platform

Test coverage and testability analysis

BSDL Device Inspection

Basic structure check (scan link integrity check)

ATPG Automatic Test Program Generator for Interconnection, Intersection, Memory

Interactive Debugging

Support more than 90 kinds of network table format

Using TCL language to develop user test program

Display results with waveform diagrams or status tables

Interactive Troubleshooting Circuit Board or Device

Interactive control and observation of digital signals on registers, buses, pins

On-board programming for FLASH and PLD

SVF file format output

PCI and USB interface controllers

Organize and manage test data according to actual needs

Run the complete test program

Tailoring or simplifying test scenarios

Output test program to production platform

Programming test platform including software modules

System construction: define components, areas, boards, systems, network table import

Toolbox: Advanced debug functions, independent confirmation of TMS, TCK, TDI, TDO, TRST signals

BSDL Check: Check that the BSDL conforms to the IEEE 1149.1 specification

Interactive debugging: fault isolation, easy to debug diagnosis

ATPG1 Basics: Check scan links to align with design performance

ATPG2 Interconnect: Automatically test interconnections between testable pins

ATPG3 storage area: auto test SRAM, SDRAM, DDR2,FLASH, NAND FLASH,

SIP Serial Flash, interconnection between devices such as Asynchronous FIFOs

Test extension: TCL test extension for testing user-defined additional further tests

Program loading: FPGA and CPLD loading program can be debugged and tested at the same time

Flash programming (option): can be any form of Flash memory programming

Netlist Merging (option): A netlist for an automated production system, generated for panel testing.

Dot navigation: generate interactive reference table, display dot, pin, JTAG unit,

Can be searched by name, pin, unit

Run time generation: output all databases to other related platforms

API server (option): can provide an application program interface to a common software platform used by users, such

Integration of JTAG testing Windows CVI, Labview, etc.

Test management: select and adjust test plan strategies as needed

Test report editing: edit any form of report format according to usage requirements

Production test preparation: the platform itself can perform complete testing,

The test is also prepared and submitted to the next production test platform completely, so that the production test platform can easily and completely run the test.

PRO Production Test Platform

Practical test application for manufacturing stage or department;

This platform makes the test a very simple one-click operation, just select the test programming platform to pass down the test program. The administrator can select the test order and test procedure.

Technical Points of Production Test Platform

Program to call into the test programming platform

Perform automatic tests and on-board programming

Administrator and Operator Ratings

Print test report

Production test platform including software modules

Program loading: FPGA and CPLD can be loaded at the same time

Flash programming (option): can be any form of Flash memory programming

Test report editing: edit any form of report format according to usage requirements

Execute production testing: Complete execution of test tasks delivered by the test programming platform.

Test scan link;

Confirm the ID code of the device

Test of ATPG1,2,3

Extended Functional Testing

FPGA/CPLD data stream download

FLASH programming

Barcode readout: convenient for UUT identification

Operator panel: The operator only needs to select the test program according to the board type, run the test,

Read test reports without special training.

Administrator Panel: Administrators can adjust the test order before production testing,

Identify JTAK connection cable, signal confirmation

REP diagnostic maintenance platform

Troubleshooting repair applications for the maintenance phase or department

For the repair of the board, the use of this platform can facilitate the rapid diagnosis of fault repair. Using the information transmitted by the production platform and the graphical circuit diagram, the fault location can be easily seen. The use of dot navigation can locate the fault on the dot. Binding probes can quickly identify and troubleshoot.

Technical Points of Diagnostic Maintenance Platform

View circuit diagram graphics

Mark the fault point on the graph

fault point location

Perform Test Procedure

Output statistics

Write special tests for troubleshooting needs

Fault platform includes software modules

Toolbox: Advanced debug functions, independent confirmation of TMS, TCK, TDI, TDO, TRST signals

Interactive debugging: fault isolation, easy to debug diagnosis

Test extension: TCL test extension for testing user-defined additional further tests

Program loading: FPGA and CPLD loading program can be debugged and tested at the same time

Flash programming (option): can be any form of Flash memory programming

Test report editing: edit any form of report format according to usage requirements

Dot navigation: generate interactive reference table, display dot, pin, JTAG unit,

Can be searched by name, pin, unit

PCB view (option): the use of graphical display of the circuit diagram can easily see the fault location of the test display

Execute production testing: Complete execution of test tasks delivered by the test programming platform.

Test scan link;

Confirm the ID code of the device

Test of ATPG1,2,3

Extended Functional Testing

FPGA/CPLD data stream download

FLASH programming